Low-complexity Sdr Implementation of Ieee 802.15.4 (zigbee) Baseband Transceiver on Application Specific Processor

This paper describes a low-cost SDR implementation and performance evaluation of an IEEE 802.15.4 (ZigBee) baseband transceiver realized with a programmable Transport Trigger Architecture (TTA) Application Specific Processor (ASP). The SDR implementation has advantages over current System-on-Chip (SOC) implementations in terms of programmability and flexibility. The transceiver is designed for the 2.4 GHz ISM band and is based on Zero Intermediate Frequency (Zero-IF) receivers. Non-coherent demodulation is used based on Minimum Shift Keying (MSK) interpretation of Offset Quadrature Phase Shift Keying (O-QPSK) modulation with Half-Sine Pulse Shaping. The Asynchronous Zero Crossing Detector (AZCD) algorithm is used for demodulation, which has lower computational complexity compared to coherent detection algorithms. With a single core TTA implementation and throughput of 250 kbps, Symbol Error Rate (SER) and Packet Error Rate (PER) meet the IEEE 802.15.4 standard requirements. The designed TTA processor occupies only a modest amount of logic on an FPGA board. KeywordsIEEE 802.15 Standard, Physical Layer, ZigBee, Baseband